Author = Agarwal, V.
Improved Performance Analysis and Design of Dual Metal Gate FinFET for Low Power Digital Applications

Volume 37, Issue 6, June 2024, Pages 1059-1066

P. Padmaja; D. Vemana Chary; R. Erigela; G. Sirisha; S. K. ChayaDevi; M. C. Pedapudi; B. Balaji; S. Cheerala; V. Agarwal; Y. Gowthami

Improved Performance Analysis and Design of Dual Metal Gate FinFET for Low Power Digital Applications


Design and Performance Analysis of High-k Gate All Around Fin-field Effect Transistor

Volume 37, Issue 3, March 2024, Pages 476-483

K. Rohith Sai; K. Girija Sravani; K. Srinivasa Rao; B. Balaji; V. Agarwal

Design and Performance Analysis of High-k Gate All Around Fin-field Effect Transistor


Design and Performance Analysis of 6H-SiC Metal-Semiconductor Field-Effect Transistor with Undoped and Recessed Area under Gate in 10nm Technology

Volume 36, Issue 12, December 2023, Pages 2264-2271

A. Krishnamurthy; D. Venkatarami Reddy; E. Radhamma; B. Jyothirmayee; D. Sreenivasa Rao; V. Agarwal; B. Balaji